SJ Semiconductor (Jiangyin) Co., Ltd. (hereinafter referred to as "SJSemi"), a leading advanced packaging and testing company located in Jiangyin , Jiangsu Province, implements the multi-layer fine pitch RDL technology, and cooperates with NANO LABS to realize the mass production of a large-size full RDL package structure of a near-memory computing chip, marking the first successful realization of replacing the traditional substrate packaging with wafer-level fan-out packaging in the country, providing an alternative packaging structures for large-size computing chips, and double securing supply chain capacity for HPC chip customers in the meantime.
The package Cuckoo 2 chip( bare Die 800 mm2, finished products up to 1600 mm2 ) adopts SJSemi ’s 4-layer RDL re-routing process. Compared with traditional packaging, advanced packaging has advantages in enhancing chip functional density, shortening interconnection length and system reconstruction. The successful production of full-RDL packaging through the cooperation with Nano Labs is a new breakthrough for the SJSemi’s advanced packaging technology platform in the industry, which will help to further expand the application of advanced packaging in the emerging markets such as artificial intelligence, blockchain, 3D spatial computing and 8K high-definition, and further meet the computing needs for the upcoming burst in the metaverse era.
Starting with 12-inch high-density bump and RDL business, striving for world-class mid-end wafer manufacturing and testing services, and continuing to develop advanced 3D Packaging, SJSemi's own intellectual property SmartPoser ™ , a 3D multi-chip integration platform is gaining substantial headway in a growing number of advanced packaging applications .
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